DE2 练习源码2-3
2016-08-23
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Part III
Figure 2a shows a circuit for a full adder, which has the inputs a, b, and ci, and produces the outputs s and co.
Parts b and c of the figure show a circuit symbol and truth table for the full adder, which produces the two-bit
binary sum cos = a + b + ci. Figure 2d shows how four instances of this full adder entity can be used to design
a circuit that adds two four-bit numbers. This type of circuit is usually called a ripple-carry adder, because of
the way that the carry signals are passed from one full adder to the next. Write VHDL code that implements this
circuit, as described below.
2
Figure 2a shows a circuit for a full adder, which has the inputs a, b, and ci, and produces the outputs s and co.
Parts b and c of the figure show a circuit symbol and truth table for the full adder, which produces the two-bit
binary sum cos = a + b + ci. Figure 2d shows how four instances of this full adder entity can be used to design
a circuit that adds two four-bit numbers. This type of circuit is usually called a ripple-carry adder, because of
the way that the carry signals are passed from one full adder to the next. Write VHDL code that implements this
circuit, as described below.
2
vhdl
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