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core_cm3.c ( 文件浏览 )

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			/**************************************************************************//**
 * @file     core_cm3.c
 * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Source File
 * @version  V1.30
 * @date     30. October 2009
 *
 * @note
 * Copyright (C) 2009 ARM Limited. All rights reserved.
 *
 * @par
 * ARM Limited (ARM) is supplying this software for use with Cortex-M 
 * processor based microcontrollers.  This file can be freely distributed 
 * within development tools that are supporting such ARM based processors. 
 *
 * @par
 * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
 *
 ******************************************************************************/

#include <stdint.h>

/* define compiler specific symbols */
#if defined ( __CC_ARM   )
  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */

#elif defined ( __ICCARM__ )
  #define __ASM           __asm                                       /*!< asm keyword for IAR Compiler          */
  #define __INLINE        inline                                      /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */

#elif defined   (  __GNUC__  )
  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */

#elif defined   (  __TASKING__  )
  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */

#endif


/* ###################  Compiler specific Intrinsics  ########################### */

#if defined ( __CC_ARM   ) /*------------------RealView Compiler -----------------*/
/* ARM armcc specific functions */

/**
 * @brief  Return the Process Stack Pointer
 *
 * @return ProcessStackPointer
 *
 * Return the actual process stack pointer
 */
__ASM uint32_t __get_PSP(void)
{

  mrs r0, psp
  bx lr

}

/**
 * @brief  Set the Process Stack Pointer
 *
 * @param  topOfProcStack  Process Stack Pointer
 *
 * Assign the value ProcessStackPointer to the MSP 
 * (process stack pointer) Cortex processor register
 */
__ASM void __set_PSP(uint32_t topOfProcStack)
{

  msr psp, r0
  bx lr

}

/**
 * @brief  Return the Main Stack Pointer
 *
 * @return Main Stack Pointer
 *
 * Return the current value of the MSP (main stack pointer)
 * Cortex processor register
 */
__ASM uint32_t __get_MSP(void)
{

  mrs r0, msp
  bx lr

}

/**
 * @brief  Set the Main Stack Pointer
 *
 * @param  topOfMainStack  Main Stack Pointer
 *
 * Assign the value mainStackPointer to the MSP 
 * (main stack pointer) Cortex processor register
 */
__ASM void __set_MSP(uint32_t mainStackPointer)
{

  msr msp, r0
  bx lr

}

/**
 * @brief  Reverse byte order in unsigned short value
 *
 * @param   value  value to reverse
 * @return         reversed value
 *
 * Reverse byte order in unsigned short value
 */
__ASM uint32_t __REV16(uint16_t value)
{

  rev16 r0, r0
  bx lr

}

/**
 * @brief  Reverse byte order in signed short value with sign extension to integer
 *
 * @param   value  value to reverse
 * @return         reversed value
 *
 * Reverse byte order in signed short value with sign extension to integer
 */
__ASM int32_t __REVSH(int16_t value)
{

  revsh r0, r0
  bx lr

}


#if (__ARMCC_VERSION < 400000)

/**
 * @brief  Remove the exclusive lock created by ldrex
 *
 * Removes the exclusive lock which is created by ldrex.
 */
__ASM void __CLREX(void)
{

  clrex

}

/**
 * @brief  Return the Base Priority value
 *
 * @return BasePriority
 *
 * Return the content of the base priority register
 */
__ASM uint32_t  __get_BASEPRI(void)
{

  mrs r0, basepri
  bx lr

}

/**
 * @brief  Set the Base Priority value
 *
 * @param  basePri  BasePriority
 *
 * Set the base priority register
 */
__ASM void __set_BASEPRI(uint32_t basePri)
{

  msr basepri, r0
  bx lr

}

/**
 * @brief  Return the Priority Mask value
 *
 * @return PriMask
 *
 * Return state of the priority mask bit from the priority mask register
 */
__ASM uint32_t __get_PRIMASK(void)
{

  mrs r0, primask
  bx lr

}

/**
 * @brief  Set the Priority Mask value
 *
 * @param  priMask  PriMask
 *
 * Set the priority mask bit in the priority mask register
 */
__ASM void __set_PRIMASK(uint32_t priMask)
{

  msr primask, r0
  bx lr

}

/**
 * @brief  Return the Fault Mask value
 *
 * @return FaultMask
 *
 * Return the content of the fault mask register
 */
__ASM uint32_t  __get_FAULTMASK(void)
{

  mrs r0, faultmask
  bx lr

}

/**
 * @brief  Set the Fault Mask value
 *
 * @param  faultMask  faultMask value
 *
 * Set the fault mask register
 */
__ASM void __set_FAULTMASK(uint32_t faultMask)
{

  msr faultmask, r0
  bx lr

}

/**
 * @brief  Return the Control Register value
 * 
 * @return Control value
 *
 * Return the content of the control register
 */
__ASM uint32_t __get_CONTROL(void)
{

  mrs r0, control
  bx lr

}

/**
 * @brief  Set the Control Register value
 *
 * @param  control  Control value
 *
 * Set the control register
 */
__ASM void __set_CONTROL(uint32_t control)
{

  msr control, r0
  bx lr

}

#endif /* __ARMCC_VERSION  */ 



#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
/* IAR iccarm specific functions */
#pragma diag_suppress=Pe940

/**
 * @brief  Return the Process Stack Pointer
 *
 * @return ProcessStackPointer
 *
 * Return the actual process stack pointer
 */
uint32_t __get_PSP(void)
{

  __ASM("mrs r0, psp");
  __ASM("bx lr");

}

/**
 * @brief  Set the Process Stack Pointer
 *
 * @param  topOfProcStack  Process Stack Pointer
 *
 * Assign the value ProcessStackPointer to the MSP 
 * (process stack pointer) Cortex processor register
 */
void __set_PSP(uint32_t topOfProcStack)
{

  __ASM("msr psp, r0");
  __ASM("bx lr");

}

/**
 * @brief  Return the Main Stack Pointer
 *
 * @return Main Stack Pointer
 *
 * Return the current value of the MSP (main stack pointer)
 * Cortex processor register
 */
uint32_t __get_MSP(void)
{

  __ASM("mrs r0, msp");
  __ASM("bx lr");

}

/**
 * @brief  Set the Main Stack Pointer
 *
 * @param  topOfMainStack  Main Stack Pointer
 *
 * Assign the value mainStackPointer to the MSP 
 * (main stack pointer) Cortex processor register
 */
void __set_MSP(uint32_t topOfMainStack)
{

  __ASM("msr msp, r0");
  __ASM("bx lr");

}

/**
 * @brief  Reverse byte order in unsigned short value
 *
 * @param  value  value to reverse
 * @return        reversed value
 *
 * Reverse byte order in unsigned short value
 */
uint32_t __REV16(uint16_t value)
{

  __ASM("rev16 r0, r0");
  __ASM("bx lr");

}

/**
 * @brief  Reverse bit order of value
 *
 * @param  value  value to reverse
 * @return        reversed value
 *
 * Reverse bit order of value
 */
uint32_t __RBIT(uint32_t value)
{

  __ASM("rbit r0, r0");
  __ASM("bx lr");

}

/**
 * @brief  LDR Exclusive (8 bit)
 *
 * @param  *addr  address pointer
 * @return        value of (*address)
 *
 * Exclusive LDR command for 8 bit values)
 */
uint8_t __LDREXB(uint8_t *addr)
{

  __ASM("ldrexb r0, [r0]");
  __ASM("bx lr"); 

}

/**
 * @brief  LDR Exclusive (16 bit)
 *
 * @param  *addr  address pointer
 * @return        value of (*address)
 *
 * Exclusive LDR command for 16 bit values
 */
uint16_t __LDREXH(uint16_t *addr)
{

  __ASM("ldrexh r0, [r0]");
  __ASM("bx lr");

}

/**
 * @brief  LDR Exclusive (32 bit)
 *
 * @param  *addr  address pointer
 * @return        value of (*address)
 *
 * Exclusive LDR command for 32 bit values
 */
uint32_t __LDREXW(uint32_t *addr)
{

  __ASM("ldrex r0, [r0]");
  __ASM("bx lr");

}

/**
 * @brief  STR Exclusive (8 bit)
 *
 * @param  value  value to store
 * @param  *addr  address pointer
 * @return        successful / failed
 *
 * Exclusive STR command for 8 bit values
 */
uint32_t __STREXB(uint8_t value, uint8_t *addr)
{

  __ASM("strexb r0, r0, [r1]");
  __ASM("bx lr");

}

/**
 * @brief  STR Exclusive (16 bit)
 *
 * @param  value  value to store
 * @param  *addr  address pointer
 * @return        successful / failed
 *
 * Exclusive STR command for 16 bit values
 */
uint32_t __STREXH(uint16_t value, uint16_t *addr)
{

  __ASM("strexh r0, r0, [r1]");
  __ASM("bx lr");

}

/**
 * @brief  STR Exclusive (32 bit)
 *
 * @param  value  value to store
 * @param  *addr  address pointer
 * @return        successful / failed
 *
 * Exclusive STR command for 32 bit values
 */
uint32_t __STREXW(uint32_t value, uint32_t *addr)
{

  __ASM("strex r0, r0, [r1]");
  __ASM("bx lr");

}

#pragma diag_default=Pe940


#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
/* GNU gcc specific functions */

/**
 * @brief  Return the Process Stack Pointer
 *
 * @return ProcessStackPointer
 *
 * Return the actual process stack pointer
 */
uint32_t __get_PSP(void) __attribute__( ( naked ) );
uint32_t __get_PSP(void)
{

  uint32_t result=0;

  __ASM volatile ("MRS %0, psp\n\t" 
                  "MOV r0, %0 \n\t"
                  "BX  lr     \n\t"  : "=r" (result) );
  return(result);

}

/**
 * @brief  Set the Process Stack Pointer
 *
 * @param  topOfProcStack  Process Stack Pointer
 *
 * Assign the value ProcessStackPointer to the MSP 
 * (process stack pointer) Cortex processor register
 */
void __set_PSP(uint
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名称 大小 修改日期
01.97 kB
01.97 kB
core_cm3.c16.87 kB2010-06-07|10:25
core_cm3.h83.71 kB2011-02-09|14:59
startup_stm32f10x_hd.s15.14 kB2011-03-10|10:52
01.97 kB
01.97 kB
misc.h8.77 kB2011-03-10|10:47
stm32f10x_adc.h21.18 kB2011-03-10|10:47
stm32f10x_bkp.h7.38 kB2011-03-10|10:47
stm32f10x_can.h26.91 kB2011-03-10|10:47
stm32f10x_cec.h6.42 kB2011-03-10|10:47
stm32f10x_crc.h2.11 kB2011-03-10|10:47
stm32f10x_dac.h14.88 kB2011-03-10|10:47
stm32f10x_dbgmcu.h3.73 kB2011-03-10|10:47
stm32f10x_dma.h20.27 kB2011-03-10|10:47
stm32f10x_exti.h6.66 kB2011-03-10|10:47
stm32f10x_flash.h24.85 kB2011-03-10|10:47
stm32f10x_fsmc.h26.38 kB2011-03-10|10:47
stm32f10x_gpio.h19.70 kB2017-10-13|22:36
stm32f10x_i2c.h29.33 kB2011-03-10|10:47
stm32f10x_iwdg.h3.74 kB2011-03-10|10:47
stm32f10x_pwr.h4.28 kB2011-03-10|10:47
stm32f10x_rcc.h29.74 kB2011-03-10|10:47
stm32f10x_rtc.h3.77 kB2011-03-10|10:47
stm32f10x_sdio.h21.35 kB2011-03-10|10:47
stm32f10x_spi.h17.31 kB2011-03-10|10:47
stm32f10x_tim.h51.20 kB2011-03-10|10:47
stm32f10x_usart.h16.16 kB2011-03-10|10:47
stm32f10x_wwdg.h2.90 kB2011-03-10|10:47
01.97 kB
misc.c6.88 kB2011-03-10|10:47
stm32f10x_adc.c46.09 kB2011-03-10|10:47
stm32f10x_bkp.c8.26 kB2011-03-10|10:47
stm32f10x_can.c44.05 kB2011-03-10|10:47
stm32f10x_cec.c11.38 kB2011-03-10|10:47
stm32f10x_crc.c3.27 kB2011-03-10|10:47
stm32f10x_dac.c18.64 kB2011-03-10|10:47
stm32f10x_dbgmcu.c5.03 kB2011-03-10|10:47
stm32f10x_dma.c28.91 kB2011-03-10|10:47
stm32f10x_exti.c6.80 kB2011-03-10|10:47
stm32f10x_flash.c61.08 kB2011-03-10|10:47
stm32f10x_fsmc.c34.65 kB2011-03-10|10:47
stm32f10x_gpio.c22.68 kB2011-03-11|17:43
stm32f10x_i2c.c44.71 kB2011-03-10|10:47
stm32f10x_iwdg.c4.80 kB2011-03-10|10:47
stm32f10x_pwr.c8.55 kB2011-03-10|10:47
stm32f10x_rcc.c50.07 kB2011-03-10|10:47
stm32f10x_rtc.c8.40 kB2011-03-10|10:47
stm32f10x_sdio.c28.25 kB2011-03-10|10:47
stm32f10x_spi.c29.52 kB2011-03-10|10:47
stm32f10x_tim.c106.60 kB2011-03-10|10:47
stm32f10x_usart.c37.41 kB2011-03-10|10:47
stm32f10x_wwdg.c5.60 kB2011-03-10|10:47
01.97 kB
morot.c2.52 kB2017-12-17|23:08
motor.h1.57 kB2017-12-17|23:09
01.97 kB
core_cm3.crf3.57 kB2017-12-17|23:19
core_cm3.d104.00 B2017-12-17|23:19
core_cm3.o10.54 kB2017-12-17|23:19
delay.crf341.66 kB2017-12-17|23:19
delay.d1.41 kB2017-12-17|23:19
delay.o373.57 kB2017-12-17|23:19
main.crf348.30 kB2017-12-17|23:19
main.d1.50 kB2017-12-17|23:19
main.o381.77 kB2017-12-17|23:19
misc.crf340.19 kB2017-12-17|23:19
misc.d1.33 kB2017-12-17|23:19
misc.o370.69 kB2017-12-17|23:19
morot.crf347.94 kB2017-12-17|23:19
morot.d1.43 kB2017-12-17|23:19
morot.o378.45 kB2017-12-17|23:19
remote.crf346.86 kB2017-12-17|23:19
remote.d1.57 kB2017-12-17|23:19
remote.o379.29 kB2017-12-17|23:19
startup_stm32f10x_hd.d63.00 B2017-12-17|23:19
startup_stm32f10x_hd.o6.65 kB2017-12-17|23:19
stm32f10x_adc.crf347.19 kB2017-12-17|23:19
stm32f10x_adc.d1.62 kB2017-12-17|23:19
stm32f10x_adc.o384.34 kB2017-12-17|23:19
stm32f10x_bkp.crf341.11 kB2017-12-17|23:19
stm32f10x_bkp.d1.62 kB2017-12-17|23:19
stm32f10x_bkp.o373.05 kB2017-12-17|23:19
stm32f10x_can.crf348.76 kB2017-12-17|23:19
stm32f10x_can.d1.62 kB2017-12-17|23:19
stm32f10x_can.o381.59 kB2017-12-17|23:19
stm32f10x_cec.crf341.65 kB2017-12-17|23:19
stm32f10x_cec.d1.62 kB2017-12-17|23:19
stm32f10x_cec.o373.47 kB2017-12-17|23:19
stm32f10x_crc.crf339.75 kB2017-12-17|23:19
stm32f10x_crc.d1.62 kB2017-12-17|23:19
stm32f10x_crc.o370.60 kB2017-12-17|23:19
stm32f10x_dac.crf341.78 kB2017-12-17|23:19
stm32f10x_dac.d1.62 kB2017-12-17|23:19
stm32f10x_dac.o373.62 kB2017-12-17|23:19
stm32f10x_dbgmcu.crf339.55 kB2017-12-17|23:19
stm32f10x_dbgmcu.d1.72 kB2017-12-17|23:19
stm32f10x_dbgmcu.o369.86 kB2017-12-17|23:19
stm32f10x_dma.crf343.22 kB2017-12-17|23:19
stm32f10x_dma.d1.62 kB2017-12-17|23:19
stm32f10x_dma.o374.23 kB2017-12-17|23:19
stm32f10x_exti.crf340.73 kB2017-12-17|23:19
stm32f10x_exti.d1.65 kB2017-12-17|23:19
stm32f10x_exti.o371.53 kB2017-12-17|23:19
stm32f10x_flash.crf347.03 kB2017-12-17|23:19
stm32f10x_flash.d1.69 kB2017-12-17|23:19
stm32f10x_flash.o380.89 kB2017-12-17|23:19
stm32f10x_fsmc.crf345.57 kB2017-12-17|23:19
stm32f10x_fsmc.d1.65 kB2017-12-17|23:19
stm32f10x_fsmc.o377.03 kB2017-12-17|23:19
stm32f10x_gpio.crf343.60 kB2017-12-17|23:19
stm32f10x_gpio.d1.65 kB2017-12-17|23:19
stm32f10x_gpio.o376.90 kB2017-12-17|23:19
stm32f10x_i2c.crf345.98 kB2017-12-17|23:19
stm32f10x_i2c.d1.62 kB2017-12-17|23:19
stm32f10x_i2c.o382.00 kB2017-12-17|23:19
stm32f10x_it.crf339.63 kB2017-12-17|23:19
stm32f10x_it.d1.54 kB2017-12-17|23:19
stm32f10x_it.o371.13 kB2017-12-17|23:19
stm32f10x_iwdg.crf339.85 kB2017-12-17|23:19
stm32f10x_iwdg.d1.65 kB2017-12-17|23:19
stm32f10x_iwdg.o370.51 kB2017-12-17|23:19
stm32f10x_pwr.crf341.02 kB2017-12-17|23:19
stm32f10x_pwr.d1.62 kB2017-12-17|23:19
stm32f10x_pwr.o372.05 kB2017-12-17|23:19
stm32f10x_rcc.crf347.10 kB2017-12-17|23:19
stm32f10x_rcc.d1.62 kB2017-12-17|23:19
stm32f10x_rcc.o381.23 kB2017-12-17|23:19
stm32f10x_rtc.crf341.02 kB2017-12-17|23:19
stm32f10x_rtc.d1.62 kB2017-12-17|23:19
stm32f10x_rtc.o372.94 kB2017-12-17|23:19
stm32f10x_sdio.crf344.20 kB2017-12-17|23:19
stm32f10x_sdio.d1.65 kB2017-12-17|23:19
stm32f10x_sdio.o378.45 kB2017-12-17|23:19
stm32f10x_spi.crf344.07 kB2017-12-17|23:19
stm32f10x_spi.d1.62 kB2017-12-17|23:19
stm32f10x_spi.o378.19 kB2017-12-17|23:19
stm32f10x_tim.crf361.76 kB2017-12-17|23:19
stm32f10x_tim.d1.62 kB2017-12-17|23:19
stm32f10x_tim.o404.37 kB2017-12-17|23:19
stm32f10x_usart.crf345.67 kB2017-12-17|23:19
stm32f10x_usart.d1.69 kB2017-12-17|23:19
stm32f10x_usart.o380.94 kB2017-12-17|23:19
stm32f10x_wwdg.crf340.29 kB2017-12-17|23:19
stm32f10x_wwdg.d1.65 kB2017-12-17|23:19
stm32f10x_wwdg.o371.44 kB2017-12-17|23:19
sys.crf342.48 kB2017-12-17|23:19
sys.d1.30 kB2017-12-17|23:19
sys.o375.83 kB2017-12-17|23:19
system_stm32f10x.crf341.32 kB2017-12-17|23:19
system_stm32f10x.d1.62 kB2017-12-17|23:19
system_stm32f10x.o371.02 kB2017-12-17|23:19
template.axf555.93 kB2017-12-17|23:19
template.build_log.htm204.00 B2017-12-18|10:43
template.hex31.47 kB2017-12-17|23:19
template.htm81.13 kB2017-12-17|23:19
template.lnp1.09 kB2017-12-17|23:19
template.sct479.00 B2017-11-26|10:06
usart.crf346.12 kB2017-12-17|23:19
usart.d1.46 kB2017-12-17|23:19
usart.o376.92 kB2017-12-17|23:19
01.97 kB
remote.c5.26 kB2017-12-07|12:43
remote.h877.00 B2017-12-07|12:51
01.97 kB
01.97 kB
delay.c7.74 kB2017-12-06|20:53
delay.h1.94 kB2017-12-06|20:53
01.97 kB
sys.c5.10 kB2017-12-17|23:19
sys.h2.98 kB2017-12-17|23:19
01.97 kB
usart.c4.97 kB2015-03-23|12:28
usart.h1.25 kB2012-09-13|14:17
01.97 kB
main.c4.46 kB2017-12-17|23:19
Release_Notes.html29.41 kB2011-04-06|18:15
startup_stm32f10x_hd.lst49.81 kB2017-12-17|23:19
stm32f10x.h619.08 kB2011-03-10|10:51
stm32f10x_conf.h3.18 kB2017-10-14|09:49
stm32f10x_it.c4.30 kB2011-04-04|19:03
stm32f10x_it.h2.04 kB2011-04-04|19:03
system_stm32f10x.c35.70 kB2011-04-04|19:03
system_stm32f10x.h2.04 kB2011-03-10|10:51
template.build_log.htm7.28 kB2017-10-14|09:38
template.map89.78 kB2017-12-17|23:19
template.uvgui.ZHENG70.76 kB2017-12-18|10:43
template.uvgui_ZHENG.bak70.58 kB2017-12-14|10:32
template.uvopt19.72 kB2017-12-07|15:36
template.uvproj21.42 kB2017-12-07|15:36
template_Target55.85 kB2017-12-17|23:19
template_uvopt.bak18.77 kB2017-11-26|10:06
template_uvproj.bak20.94 kB2017-11-26|10:06
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core_cm3.c (6.40 MB)

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