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stm32f10x_adc.h ( 文件浏览 )

  • aaa923124003 发布于2018-04-23
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			/**
  ******************************************************************************
  * @file    stm32f10x_adc.h
  * @author  MCD Application Team
  * @version V3.5.0
  * @date    11-March-2011
  * @brief   This file contains all the functions prototypes for the ADC firmware 
  *          library.
  ******************************************************************************
  * @attention
  *
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  ******************************************************************************
  */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_ADC_H
#define __STM32F10x_ADC_H

#ifdef __cplusplus
 extern "C" {

#endif

/* Includes ------------------------------------------------------------------*/
#include "stm32f10x.h"

/** @addtogroup STM32F10x_StdPeriph_Driver
  * @{

  */

/** @addtogroup ADC
  * @{

  */

/** @defgroup ADC_Exported_Types
  * @{

  */

/** 
  * @brief  ADC Init structure definition  
  */

typedef struct
{

  uint32_t ADC_Mode;                      /*!< Configures the ADC to operate in independent or
                                               dual mode. 
                                               This parameter can be a value of @ref ADC_mode */

  FunctionalState ADC_ScanConvMode;       /*!< Specifies whether the conversion is performed in
                                               Scan (multichannels) or Single (one channel) mode.
                                               This parameter can be set to ENABLE or DISABLE */

  FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in
                                               Continuous or Single mode.
                                               This parameter can be set to ENABLE or DISABLE. */

  uint32_t ADC_ExternalTrigConv;          /*!< Defines the external trigger used to start the analog
                                               to digital conversion of regular channels. This parameter
                                               can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */

  uint32_t ADC_DataAlign;                 /*!< Specifies whether the ADC data alignment is left or right.
                                               This parameter can be a value of @ref ADC_data_align */

  uint8_t ADC_NbrOfChannel;               /*!< Specifies the number of ADC channels that will be converted
                                               using the sequencer for regular channel group.
                                               This parameter must range from 1 to 16. */

}ADC_InitTypeDef;
/**
  * @
}
  */

/** @defgroup ADC_Exported_Constants
  * @{

  */

#define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
                                   ((PERIPH) == ADC2) || \
                                   ((PERIPH) == ADC3))

#define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
                                   ((PERIPH) == ADC3))

/** @defgroup ADC_mode 
  * @{

  */

#define ADC_Mode_Independent                       ((uint32_t)0x00000000)
#define ADC_Mode_RegInjecSimult                    ((uint32_t)0x00010000)
#define ADC_Mode_RegSimult_AlterTrig               ((uint32_t)0x00020000)
#define ADC_Mode_InjecSimult_FastInterl            ((uint32_t)0x00030000)
#define ADC_Mode_InjecSimult_SlowInterl            ((uint32_t)0x00040000)
#define ADC_Mode_InjecSimult                       ((uint32_t)0x00050000)
#define ADC_Mode_RegSimult                         ((uint32_t)0x00060000)
#define ADC_Mode_FastInterl                        ((uint32_t)0x00070000)
#define ADC_Mode_SlowInterl                        ((uint32_t)0x00080000)
#define ADC_Mode_AlterTrig                         ((uint32_t)0x00090000)

#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
                           ((MODE) == ADC_Mode_RegInjecSimult) || \
                           ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \
                           ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \
                           ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \
                           ((MODE) == ADC_Mode_InjecSimult) || \
                           ((MODE) == ADC_Mode_RegSimult) || \
                           ((MODE) == ADC_Mode_FastInterl) || \
                           ((MODE) == ADC_Mode_SlowInterl) || \
                           ((MODE) == ADC_Mode_AlterTrig))
/**
  * @
}
  */

/** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion 
  * @{

  */

#define ADC_ExternalTrigConv_T1_CC1                ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */
#define ADC_ExternalTrigConv_T1_CC2                ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */
#define ADC_ExternalTrigConv_T2_CC2                ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */
#define ADC_ExternalTrigConv_T3_TRGO               ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */
#define ADC_ExternalTrigConv_T4_CC4                ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */
#define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO    ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */

#define ADC_ExternalTrigConv_T1_CC3                ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */
#define ADC_ExternalTrigConv_None                  ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */

#define ADC_ExternalTrigConv_T3_CC1                ((uint32_t)0x00000000) /*!< For ADC3 only */
#define ADC_ExternalTrigConv_T2_CC3                ((uint32_t)0x00020000) /*!< For ADC3 only */
#define ADC_ExternalTrigConv_T8_CC1                ((uint32_t)0x00060000) /*!< For ADC3 only */
#define ADC_ExternalTrigConv_T8_TRGO               ((uint32_t)0x00080000) /*!< For ADC3 only */
#define ADC_ExternalTrigConv_T5_CC1                ((uint32_t)0x000A0000) /*!< For ADC3 only */
#define ADC_ExternalTrigConv_T5_CC3                ((uint32_t)0x000C0000) /*!< For ADC3 only */

#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_None) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
                                  ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3))
/**
  * @
}
  */

/** @defgroup ADC_data_align 
  * @{

  */

#define ADC_DataAlign_Right                        ((uint32_t)0x00000000)
#define ADC_DataAlign_Left                         ((uint32_t)0x00000800)
#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
                                  ((ALIGN) == ADC_DataAlign_Left))
/**
  * @
}
  */

/** @defgroup ADC_channels 
  * @{

  */

#define ADC_Channel_0                               ((uint8_t)0x00)
#define ADC_Channel_1                               ((uint8_t)0x01)
#define ADC_Channel_2                               ((uint8_t)0x02)
#define ADC_Channel_3                               ((uint8_t)0x03)
#define ADC_Channel_4                               ((uint8_t)0x04)
#define ADC_Channel_5                               ((uint8_t)0x05)
#define ADC_Channel_6                               ((uint8_t)0x06)
#define ADC_Channel_7                               ((uint8_t)0x07)
#define ADC_Channel_8                               ((uint8_t)0x08)
#define ADC_Channel_9                               ((uint8_t)0x09)
#define ADC_Channel_10                              ((uint8_t)0x0A)
#define ADC_Channel_11                              ((uint8_t)0x0B)
#define ADC_Channel_12                              ((uint8_t)0x0C)
#define ADC_Channel_13                              ((uint8_t)0x0D)
#define ADC_Channel_14                              ((uint8_t)0x0E)
#define ADC_Channel_15                              ((uint8_t)0x0F)
#define ADC_Channel_16                              ((uint8_t)0x10)
#define ADC_Channel_17                              ((uint8_t)0x11)

#define ADC_Channel_TempSensor                      ((uint8_t)ADC_Channel_16)
#define ADC_Channel_Vrefint                         ((uint8_t)ADC_Channel_17)

#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
                                 ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
                                 ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
                                 ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
                                 ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \
                                 ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \
      
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名称 大小 修改日期
01.97 kB
01.97 kB
core_cm3.c16.87 kB2010-06-07|10:25
core_cm3.h83.71 kB2011-02-09|14:59
startup_stm32f10x_hd.s15.14 kB2011-03-10|10:52
01.97 kB
01.97 kB
misc.h8.77 kB2011-03-10|10:47
stm32f10x_adc.h21.18 kB2011-03-10|10:47
stm32f10x_bkp.h7.38 kB2011-03-10|10:47
stm32f10x_can.h26.91 kB2011-03-10|10:47
stm32f10x_cec.h6.42 kB2011-03-10|10:47
stm32f10x_crc.h2.11 kB2011-03-10|10:47
stm32f10x_dac.h14.88 kB2011-03-10|10:47
stm32f10x_dbgmcu.h3.73 kB2011-03-10|10:47
stm32f10x_dma.h20.27 kB2011-03-10|10:47
stm32f10x_exti.h6.66 kB2011-03-10|10:47
stm32f10x_flash.h24.85 kB2011-03-10|10:47
stm32f10x_fsmc.h26.38 kB2011-03-10|10:47
stm32f10x_gpio.h19.70 kB2017-10-13|22:36
stm32f10x_i2c.h29.33 kB2011-03-10|10:47
stm32f10x_iwdg.h3.74 kB2011-03-10|10:47
stm32f10x_pwr.h4.28 kB2011-03-10|10:47
stm32f10x_rcc.h29.74 kB2011-03-10|10:47
stm32f10x_rtc.h3.77 kB2011-03-10|10:47
stm32f10x_sdio.h21.35 kB2011-03-10|10:47
stm32f10x_spi.h17.31 kB2011-03-10|10:47
stm32f10x_tim.h51.20 kB2011-03-10|10:47
stm32f10x_usart.h16.16 kB2011-03-10|10:47
stm32f10x_wwdg.h2.90 kB2011-03-10|10:47
01.97 kB
misc.c6.88 kB2011-03-10|10:47
stm32f10x_adc.c46.09 kB2011-03-10|10:47
stm32f10x_bkp.c8.26 kB2011-03-10|10:47
stm32f10x_can.c44.05 kB2011-03-10|10:47
stm32f10x_cec.c11.38 kB2011-03-10|10:47
stm32f10x_crc.c3.27 kB2011-03-10|10:47
stm32f10x_dac.c18.64 kB2011-03-10|10:47
stm32f10x_dbgmcu.c5.03 kB2011-03-10|10:47
stm32f10x_dma.c28.91 kB2011-03-10|10:47
stm32f10x_exti.c6.80 kB2011-03-10|10:47
stm32f10x_flash.c61.08 kB2011-03-10|10:47
stm32f10x_fsmc.c34.65 kB2011-03-10|10:47
stm32f10x_gpio.c22.68 kB2011-03-11|17:43
stm32f10x_i2c.c44.71 kB2011-03-10|10:47
stm32f10x_iwdg.c4.80 kB2011-03-10|10:47
stm32f10x_pwr.c8.55 kB2011-03-10|10:47
stm32f10x_rcc.c50.07 kB2011-03-10|10:47
stm32f10x_rtc.c8.40 kB2011-03-10|10:47
stm32f10x_sdio.c28.25 kB2011-03-10|10:47
stm32f10x_spi.c29.52 kB2011-03-10|10:47
stm32f10x_tim.c106.60 kB2011-03-10|10:47
stm32f10x_usart.c37.41 kB2011-03-10|10:47
stm32f10x_wwdg.c5.60 kB2011-03-10|10:47
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delay.crf341.66 kB2017-12-17|23:19
delay.d1.41 kB2017-12-17|23:19
delay.o373.57 kB2017-12-17|23:19
main.crf348.30 kB2017-12-17|23:19
main.d1.50 kB2017-12-17|23:19
main.o381.77 kB2017-12-17|23:19
misc.crf340.19 kB2017-12-17|23:19
misc.d1.33 kB2017-12-17|23:19
misc.o370.69 kB2017-12-17|23:19
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startup_stm32f10x_hd.d63.00 B2017-12-17|23:19
startup_stm32f10x_hd.o6.65 kB2017-12-17|23:19
stm32f10x_adc.crf347.19 kB2017-12-17|23:19
stm32f10x_adc.d1.62 kB2017-12-17|23:19
stm32f10x_adc.o384.34 kB2017-12-17|23:19
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stm32f10x_can.crf348.76 kB2017-12-17|23:19
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stm32f10x_cec.crf341.65 kB2017-12-17|23:19
stm32f10x_cec.d1.62 kB2017-12-17|23:19
stm32f10x_cec.o373.47 kB2017-12-17|23:19
stm32f10x_crc.crf339.75 kB2017-12-17|23:19
stm32f10x_crc.d1.62 kB2017-12-17|23:19
stm32f10x_crc.o370.60 kB2017-12-17|23:19
stm32f10x_dac.crf341.78 kB2017-12-17|23:19
stm32f10x_dac.d1.62 kB2017-12-17|23:19
stm32f10x_dac.o373.62 kB2017-12-17|23:19
stm32f10x_dbgmcu.crf339.55 kB2017-12-17|23:19
stm32f10x_dbgmcu.d1.72 kB2017-12-17|23:19
stm32f10x_dbgmcu.o369.86 kB2017-12-17|23:19
stm32f10x_dma.crf343.22 kB2017-12-17|23:19
stm32f10x_dma.d1.62 kB2017-12-17|23:19
stm32f10x_dma.o374.23 kB2017-12-17|23:19
stm32f10x_exti.crf340.73 kB2017-12-17|23:19
stm32f10x_exti.d1.65 kB2017-12-17|23:19
stm32f10x_exti.o371.53 kB2017-12-17|23:19
stm32f10x_flash.crf347.03 kB2017-12-17|23:19
stm32f10x_flash.d1.69 kB2017-12-17|23:19
stm32f10x_flash.o380.89 kB2017-12-17|23:19
stm32f10x_fsmc.crf345.57 kB2017-12-17|23:19
stm32f10x_fsmc.d1.65 kB2017-12-17|23:19
stm32f10x_fsmc.o377.03 kB2017-12-17|23:19
stm32f10x_gpio.crf343.60 kB2017-12-17|23:19
stm32f10x_gpio.d1.65 kB2017-12-17|23:19
stm32f10x_gpio.o376.90 kB2017-12-17|23:19
stm32f10x_i2c.crf345.98 kB2017-12-17|23:19
stm32f10x_i2c.d1.62 kB2017-12-17|23:19
stm32f10x_i2c.o382.00 kB2017-12-17|23:19
stm32f10x_it.crf339.63 kB2017-12-17|23:19
stm32f10x_it.d1.54 kB2017-12-17|23:19
stm32f10x_it.o371.13 kB2017-12-17|23:19
stm32f10x_iwdg.crf339.85 kB2017-12-17|23:19
stm32f10x_iwdg.d1.65 kB2017-12-17|23:19
stm32f10x_iwdg.o370.51 kB2017-12-17|23:19
stm32f10x_pwr.crf341.02 kB2017-12-17|23:19
stm32f10x_pwr.d1.62 kB2017-12-17|23:19
stm32f10x_pwr.o372.05 kB2017-12-17|23:19
stm32f10x_rcc.crf347.10 kB2017-12-17|23:19
stm32f10x_rcc.d1.62 kB2017-12-17|23:19
stm32f10x_rcc.o381.23 kB2017-12-17|23:19
stm32f10x_rtc.crf341.02 kB2017-12-17|23:19
stm32f10x_rtc.d1.62 kB2017-12-17|23:19
stm32f10x_rtc.o372.94 kB2017-12-17|23:19
stm32f10x_sdio.crf344.20 kB2017-12-17|23:19
stm32f10x_sdio.d1.65 kB2017-12-17|23:19
stm32f10x_sdio.o378.45 kB2017-12-17|23:19
stm32f10x_spi.crf344.07 kB2017-12-17|23:19
stm32f10x_spi.d1.62 kB2017-12-17|23:19
stm32f10x_spi.o378.19 kB2017-12-17|23:19
stm32f10x_tim.crf361.76 kB2017-12-17|23:19
stm32f10x_tim.d1.62 kB2017-12-17|23:19
stm32f10x_tim.o404.37 kB2017-12-17|23:19
stm32f10x_usart.crf345.67 kB2017-12-17|23:19
stm32f10x_usart.d1.69 kB2017-12-17|23:19
stm32f10x_usart.o380.94 kB2017-12-17|23:19
stm32f10x_wwdg.crf340.29 kB2017-12-17|23:19
stm32f10x_wwdg.d1.65 kB2017-12-17|23:19
stm32f10x_wwdg.o371.44 kB2017-12-17|23:19
sys.crf342.48 kB2017-12-17|23:19
sys.d1.30 kB2017-12-17|23:19
sys.o375.83 kB2017-12-17|23:19
system_stm32f10x.crf341.32 kB2017-12-17|23:19
system_stm32f10x.d1.62 kB2017-12-17|23:19
system_stm32f10x.o371.02 kB2017-12-17|23:19
template.axf555.93 kB2017-12-17|23:19
template.build_log.htm204.00 B2017-12-18|10:43
template.hex31.47 kB2017-12-17|23:19
template.htm81.13 kB2017-12-17|23:19
template.lnp1.09 kB2017-12-17|23:19
template.sct479.00 B2017-11-26|10:06
usart.crf346.12 kB2017-12-17|23:19
usart.d1.46 kB2017-12-17|23:19
usart.o376.92 kB2017-12-17|23:19
01.97 kB
remote.c5.26 kB2017-12-07|12:43
remote.h877.00 B2017-12-07|12:51
01.97 kB
01.97 kB
delay.c7.74 kB2017-12-06|20:53
delay.h1.94 kB2017-12-06|20:53
01.97 kB
sys.c5.10 kB2017-12-17|23:19
sys.h2.98 kB2017-12-17|23:19
01.97 kB
usart.c4.97 kB2015-03-23|12:28
usart.h1.25 kB2012-09-13|14:17
01.97 kB
main.c4.46 kB2017-12-17|23:19
Release_Notes.html29.41 kB2011-04-06|18:15
startup_stm32f10x_hd.lst49.81 kB2017-12-17|23:19
stm32f10x.h619.08 kB2011-03-10|10:51
stm32f10x_conf.h3.18 kB2017-10-14|09:49
stm32f10x_it.c4.30 kB2011-04-04|19:03
stm32f10x_it.h2.04 kB2011-04-04|19:03
system_stm32f10x.c35.70 kB2011-04-04|19:03
system_stm32f10x.h2.04 kB2011-03-10|10:51
template.build_log.htm7.28 kB2017-10-14|09:38
template.map89.78 kB2017-12-17|23:19
template.uvgui.ZHENG70.76 kB2017-12-18|10:43
template.uvgui_ZHENG.bak70.58 kB2017-12-14|10:32
template.uvopt19.72 kB2017-12-07|15:36
template.uvproj21.42 kB2017-12-07|15:36
template_Target55.85 kB2017-12-17|23:19
template_uvopt.bak18.77 kB2017-11-26|10:06
template_uvproj.bak20.94 kB2017-11-26|10:06
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