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stm32f10x_sdio.h ( 文件浏览 )

  • aaa923124003 发布于2018-04-23
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			/**
  ******************************************************************************
  * @file    stm32f10x_sdio.h
  * @author  MCD Application Team
  * @version V3.5.0
  * @date    11-March-2011
  * @brief   This file contains all the functions prototypes for the SDIO firmware
  *          library.
  ******************************************************************************
  * @attention
  *
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  ******************************************************************************
  */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_SDIO_H
#define __STM32F10x_SDIO_H

#ifdef __cplusplus
 extern "C" {

#endif

/* Includes ------------------------------------------------------------------*/
#include "stm32f10x.h"

/** @addtogroup STM32F10x_StdPeriph_Driver
  * @{

  */

/** @addtogroup SDIO
  * @{

  */

/** @defgroup SDIO_Exported_Types
  * @{

  */

typedef struct
{

  uint32_t SDIO_ClockEdge;            /*!< Specifies the clock transition on which the bit capture is made.
                                           This parameter can be a value of @ref SDIO_Clock_Edge */

  uint32_t SDIO_ClockBypass;          /*!< Specifies whether the SDIO Clock divider bypass is
                                           enabled or disabled.
                                           This parameter can be a value of @ref SDIO_Clock_Bypass */

  uint32_t SDIO_ClockPowerSave;       /*!< Specifies whether SDIO Clock output is enabled or
                                           disabled when the bus is idle.
                                           This parameter can be a value of @ref SDIO_Clock_Power_Save */

  uint32_t SDIO_BusWide;              /*!< Specifies the SDIO bus width.
                                           This parameter can be a value of @ref SDIO_Bus_Wide */

  uint32_t SDIO_HardwareFlowControl;  /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
                                           This parameter can be a value of @ref SDIO_Hardware_Flow_Control */

  uint8_t SDIO_ClockDiv;              /*!< Specifies the clock frequency of the SDIO controller.
                                           This parameter can be a value between 0x00 and 0xFF. */
                                           

} SDIO_InitTypeDef;

typedef struct
{

  uint32_t SDIO_Argument;  /*!< Specifies the SDIO command argument which is sent
                                to a card as part of a command message. If a command
                                contains an argument, it must be loaded into this register
                                before writing the command to the command register */

  uint32_t SDIO_CmdIndex;  /*!< Specifies the SDIO command index. It must be lower than 0x40. */

  uint32_t SDIO_Response;  /*!< Specifies the SDIO response type.
                                This parameter can be a value of @ref SDIO_Response_Type */

  uint32_t SDIO_Wait;      /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled.
                                This parameter can be a value of @ref SDIO_Wait_Interrupt_State */

  uint32_t SDIO_CPSM;      /*!< Specifies whether SDIO Command path state machine (CPSM)
                                is enabled or disabled.
                                This parameter can be a value of @ref SDIO_CPSM_State */

} SDIO_CmdInitTypeDef;

typedef struct
{

  uint32_t SDIO_DataTimeOut;    /*!< Specifies the data timeout period in card bus clock periods. */

  uint32_t SDIO_DataLength;     /*!< Specifies the number of data bytes to be transferred. */
 
  uint32_t SDIO_DataBlockSize;  /*!< Specifies the data block size for block transfer.
                                     This parameter can be a value of @ref SDIO_Data_Block_Size */
 
  uint32_t SDIO_TransferDir;    /*!< Specifies the data transfer direction, whether the transfer
                                     is a read or write.
                                     This parameter can be a value of @ref SDIO_Transfer_Direction */
 
  uint32_t SDIO_TransferMode;   /*!< Specifies whether data transfer is in stream or block mode.
                                     This parameter can be a value of @ref SDIO_Transfer_Type */
 
  uint32_t SDIO_DPSM;           /*!< Specifies whether SDIO Data path state machine (DPSM)
                                     is enabled or disabled.
                                     This parameter can be a value of @ref SDIO_DPSM_State */

} SDIO_DataInitTypeDef;

/**
  * @
}
  */ 

/** @defgroup SDIO_Exported_Constants
  * @{

  */

/** @defgroup SDIO_Clock_Edge 
  * @{

  */

#define SDIO_ClockEdge_Rising               ((uint32_t)0x00000000)
#define SDIO_ClockEdge_Falling              ((uint32_t)0x00002000)
#define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \
                                  ((EDGE) == SDIO_ClockEdge_Falling))
/**
  * @
}
  */

/** @defgroup SDIO_Clock_Bypass 
  * @{

  */

#define SDIO_ClockBypass_Disable             ((uint32_t)0x00000000)
#define SDIO_ClockBypass_Enable              ((uint32_t)0x00000400)    
#define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \
                                     ((BYPASS) == SDIO_ClockBypass_Enable))
/**
  * @
}
  */ 

/** @defgroup SDIO_Clock_Power_Save 
  * @{

  */

#define SDIO_ClockPowerSave_Disable         ((uint32_t)0x00000000)
#define SDIO_ClockPowerSave_Enable          ((uint32_t)0x00000200) 
#define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \
                                        ((SAVE) == SDIO_ClockPowerSave_Enable))
/**
  * @
}
  */

/** @defgroup SDIO_Bus_Wide 
  * @{

  */

#define SDIO_BusWide_1b                     ((uint32_t)0x00000000)
#define SDIO_BusWide_4b                     ((uint32_t)0x00000800)
#define SDIO_BusWide_8b                     ((uint32_t)0x00001000)
#define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \
                                ((WIDE) == SDIO_BusWide_8b))

/**
  * @
}
  */

/** @defgroup SDIO_Hardware_Flow_Control 
  * @{

  */

#define SDIO_HardwareFlowControl_Disable    ((uint32_t)0x00000000)
#define SDIO_HardwareFlowControl_Enable     ((uint32_t)0x00004000)
#define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \
                                                ((CONTROL) == SDIO_HardwareFlowControl_Enable))
/**
  * @
}
  */

/** @defgroup SDIO_Power_State 
  * @{

  */

#define SDIO_PowerState_OFF                 ((uint32_t)0x00000000)
#define SDIO_PowerState_ON                  ((uint32_t)0x00000003)
#define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON)) 
/**
  * @
}
  */ 


/** @defgroup SDIO_Interrupt_sources 
  * @{

  */

#define SDIO_IT_CCRCFAIL                    ((uint32_t)0x00000001)
#define SDIO_IT_DCRCFAIL                    ((uint32_t)0x00000002)
#define SDIO_IT_CTIMEOUT                    ((uint32_t)0x00000004)
#define SDIO_IT_DTIMEOUT                    ((uint32_t)0x00000008)
#define SDIO_IT_TXUNDERR                    ((uint32_t)0x00000010)
#define SDIO_IT_RXOVERR                     ((uint32_t)0x00000020)
#define SDIO_IT_CMDREND                     ((uint32_t)0x00000040)
#define SDIO_IT_CMDSENT                     ((uint32_t)0x00000080)
#define SDIO_IT_DATAEND                     ((uint32_t)0x00000100)
#define SDIO_IT_STBITERR                    ((uint32_t)0x00000200)
#define SDIO_IT_DBCKEND                     ((uint32_t)0x00000400)
#define SDIO_IT_CMDACT                      ((uint32_t)0x00000800)
#define SDIO_IT_TXACT                       ((uint32_t)0x00001000)
#define SDIO_IT_RXACT                       ((uint32_t)0x00002000)
#define SDIO_IT_TXFIFOHE                    ((uint32_t)0x00004000)
#define SDIO_IT_RXFIFOHF                    ((uint32_t)0x00008000)
#define SDIO_IT_TXFIFOF                     ((uint32_t)0x00010000)
#define SDIO_IT_RXFIFOF                     ((uint32_t)0x00020000)
#define SDIO_IT_TXFIFOE                     ((uint32_t)0x00040000)
#define SDIO_IT_RXFIFOE                     ((uint32_t)0x00080000)
#define SDIO_IT_TXDAVL                      ((uint32_t)0x00100000)
#define SDIO_IT_RXDAVL                      ((uint32_t)0x00200000)
#define SDIO_IT_SDIOIT                      ((uint32_t)0x00400000)
#define SDIO_IT_CEATAEND                    ((uint32_t)0x00800000)
#define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00))
/**
  * @
}
  */ 

/** @defgroup SDIO_Command_Index
  * @{

  */

#define IS_SDIO_CMD_INDEX(INDEX)            ((INDEX) < 0x40)
/**
  * @
}
  */

/** @defgroup SDIO_Response_Type 
  * @{

  */

#define SDIO_Response_No                    ((uint32_t)0x00000000)
#define SDIO_Response_Short                 ((uint32_t)0x00000040)
#define SDIO_Response_Long                  ((uint32_t)0x000000C0)
#define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \
                                    ((RESPONSE) == SDIO_Response_Short) || \
                                    ((RESPONSE) == SDIO_Response_Long))
/**
  * @
}
  */

/** @defgroup SDIO_Wait_Interrupt_State 
  * @{

  */

#define SDIO_Wait_No                        ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */
#define SDIO_Wait_IT                        ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request
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01.97 kB
01.97 kB
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stm32f10x_rcc.h29.74 kB2011-03-10|10:47
stm32f10x_rtc.h3.77 kB2011-03-10|10:47
stm32f10x_sdio.h21.35 kB2011-03-10|10:47
stm32f10x_spi.h17.31 kB2011-03-10|10:47
stm32f10x_tim.h51.20 kB2011-03-10|10:47
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stm32f10x_sdio.c28.25 kB2011-03-10|10:47
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stm32f10x_rcc.d1.62 kB2017-12-17|23:19
stm32f10x_rcc.o381.23 kB2017-12-17|23:19
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stm32f10x_rtc.o372.94 kB2017-12-17|23:19
stm32f10x_sdio.crf344.20 kB2017-12-17|23:19
stm32f10x_sdio.d1.65 kB2017-12-17|23:19
stm32f10x_sdio.o378.45 kB2017-12-17|23:19
stm32f10x_spi.crf344.07 kB2017-12-17|23:19
stm32f10x_spi.d1.62 kB2017-12-17|23:19
stm32f10x_spi.o378.19 kB2017-12-17|23:19
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stm32f10x_tim.d1.62 kB2017-12-17|23:19
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stm32f10x_wwdg.d1.65 kB2017-12-17|23:19
stm32f10x_wwdg.o371.44 kB2017-12-17|23:19
sys.crf342.48 kB2017-12-17|23:19
sys.d1.30 kB2017-12-17|23:19
sys.o375.83 kB2017-12-17|23:19
system_stm32f10x.crf341.32 kB2017-12-17|23:19
system_stm32f10x.d1.62 kB2017-12-17|23:19
system_stm32f10x.o371.02 kB2017-12-17|23:19
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template.build_log.htm204.00 B2017-12-18|10:43
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usart.d1.46 kB2017-12-17|23:19
usart.o376.92 kB2017-12-17|23:19
01.97 kB
remote.c5.26 kB2017-12-07|12:43
remote.h877.00 B2017-12-07|12:51
01.97 kB
01.97 kB
delay.c7.74 kB2017-12-06|20:53
delay.h1.94 kB2017-12-06|20:53
01.97 kB
sys.c5.10 kB2017-12-17|23:19
sys.h2.98 kB2017-12-17|23:19
01.97 kB
usart.c4.97 kB2015-03-23|12:28
usart.h1.25 kB2012-09-13|14:17
01.97 kB
main.c4.46 kB2017-12-17|23:19
Release_Notes.html29.41 kB2011-04-06|18:15
startup_stm32f10x_hd.lst49.81 kB2017-12-17|23:19
stm32f10x.h619.08 kB2011-03-10|10:51
stm32f10x_conf.h3.18 kB2017-10-14|09:49
stm32f10x_it.c4.30 kB2011-04-04|19:03
stm32f10x_it.h2.04 kB2011-04-04|19:03
system_stm32f10x.c35.70 kB2011-04-04|19:03
system_stm32f10x.h2.04 kB2011-03-10|10:51
template.build_log.htm7.28 kB2017-10-14|09:38
template.map89.78 kB2017-12-17|23:19
template.uvgui.ZHENG70.76 kB2017-12-18|10:43
template.uvgui_ZHENG.bak70.58 kB2017-12-14|10:32
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template.uvproj21.42 kB2017-12-07|15:36
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