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modelsim输出文件代码演示 verilog

资源描述 modelsim输出文件代码演示 verilog  内含头文件和testbench.Verilog HDL是一种硬件描述语言(HDL:Hardware Description Language),以文本形式来描述数字系统硬件的结构和行为的语言,用它可以表示逻辑电路图、逻辑表达式。...

pArticlecandy

pArticle Candy for Monkey! Big thanks to Mike Dogan - http://www.x-pressive.com who is the originator of pArticleCandy for BlitzBasic3d. If you use Corona SDK check out his page as pArticleCandy is available for Android/iOS there!...

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cost2100model

This project provides the COST2100 MIMO channel model implementation based on Matlab R2007a and also implementation based on C++. The code is under GNU GpL v3 with public access to those who are interested in geometric based stochastic MIMO channel modeling for single-link and multi-link communicati...

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dlmodel

DLmodel A Tool for Dealing with Description Logics DLmodel is an ApI for accesing a Description Logic model, implemented using the latest Semantic Web technologies. It has a Java implementation that offers an abstract interface for easy access to OWL files using an ApI as Jena and a DL resoner...

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model 3 pHp Framework

model3pHp is a pHp Framework that's intented to be simple and easy to learn, model3 uses the design pattern MVC like other many frameworks but is a good starting point to understand how MVC works. This framework is conceptually based in the pHp Zend Framework, so, many of the use of this is similar...

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